In a normal synchronous dynamic random access memory (SDRAM) operation, before any READ or WRITE command can be issued to a bank within the SDRAM, a row in that bank must be opened (activated). Opening a row in the bank is accomplished via an ACTIVE command, which selects both the bank and the row to be activated. A subsequent ACTIVE command to a different row in the same or a different bank can only be issued after the previous active row has been closed (precharged). Closing of the active row is accomplished via a PRECHARGE command. Testing of a synchronous dynamic random access memory (SDRAM) can be accomplished through a variety of methods, such as by a tester machine that can directly connect to the SDRAM. Another method that can be used to test an SDRAM already connected to the final system printed circuit board (PCB) is a built in self test (BIST) circuit.
To enable a BIST circuit to perform a wide variety of test patterns on synchronous dynamic random access memory (SDRAM), it would be desirable to implement automated control of the opening and closing of SDRAM rows.